BLANCO, Cláudio José Cavalcante2025-02-112012OLIVEIRA, Edson Farias de. Otimização do tempo de teste funcional de placa de circuito impresso montada para computador pessoal. 2012. Dissertação (Mestrado em Engenharia Elétrica) – Universidade Federal do Pará, Instituto de Tecnologia, Belém, 2012.https://rigalileo.itegam.org.br/handle/123456789/401The increasing competitiveness among companies in the same sector has made continuous process optimization essential to reduce costs. This study evaluates the time involved in the functional testing phase of motherboards produced in the Industrial Pole of Manaus and proposes improvements for optimization. A system for image capture was developed to analyze idle times, along with test devices and a proprietary Linux-based test system, replacing the previous system that depended on foreign suppliers. Percentage gains were demonstrated through four optimization proposals: unifying tests, performing simultaneous tests on two boards, replacing the test system, and automating the test device. The results obtained after implementing these improvements were positive, reinforcing the importance of applying scientific methodologies combined with innovation to optimize production processes.pdf.OtimizaçãoTeste funcionalProcesso produtivoPolo Industrial de ManausAutomaçãoOTIMIZAÇÃO DO TEMPO DE TESTE FUNCIONAL DE PLACA DE CIRCUITO IMPRESSO MONTADA PARA COMPUTADOR PESSOALDissertaçãoEngenharia Elétrica